generating waveform FPGA

[jeanT]

hello everyone !

I've got some problems with display waveform that i generate with the FPGA 7951R, I want to display a 2 Mhz waveform but the result i get is not really satisfaying (see attached), is that because of the time loop ? shannon ?

Thank you.

J.

[crossrulz]

You really should change that While loop to a Timed Loop.  In the LV FPGA world, we call this a Single Cycled Timed Loop.  Everything inside of a SSTL is to run in a single FPGA Close Cycle.