generation and acquisition

[Salvio]

Hi!
I've got a problem.
I want to generate  a signal with compactRIO and then i want to acquire it.
I've done first two different VI with two different FPGA (one for generation and one for acquisition) and they work. Now i want to create only one VI that  can generate and then acquire.
I've tried to unite the two VI and the two different FPGA but it does't work...the only thing that i see is or the generation or the acquisition!why?how can i do?
plz help me fast or in any case say what you don't understand. i really need help.

[Carmo]

Hi!!!

Can you send us a sample of your code?

Regards

[Salvio]

this is for the acquisition

[Salvio]

these for the generation.
how i have to put them to have one VI for the generation and the acquisition?
make me also a graphic esample...it is the same..i need only to understood how them can work together

[JMota]

Hi,

Here is my best guess as of why I think things are not working for you.

I think what you are trying to do is to run both FPGA VIs at the same time in the same cRIO FPGA target, same way as you can run multiple top-level VIs on a Windows or RT system. There is one key difference with LV FPGA, which is that you can only run one (1) top-level FPGA VI at a time on the FPGA. That means that you need to either sequence the execution of the FPGA VIs, or you need to put all the logic into one single FPGA VI which is probably what you need.

That being said, you should copy-paste the contents of one of your FPGA VIs onto the other, add any needed extra logic to make sure things will run fine in parallel, and combine the two Host VIs to interface with this new FPGA VI.

Hope this solves the problem you were having.

By the way, this other post seems to ask about the same thing, right?

http://forums.ni.com/ni/board/message?board.id=170&message.id=226760#M226760

JMota
National Instruments

[Salvio]

yes the guy of the post that you have linked me has my same problem.
I use a NI 9263 to generate my signal and i want at same time acquire it with my NI 9215.
I mean first i generate then when i click on a button i want to acquire what i've generated.
Before to do this i've tried to see if the VI of the generation and the VI of acquisition work...and they work! Infact i've generated a signal and i've seen it on my oscilloscope than i've started the VI of acquisition and i've acquired by my signal function's generator.
Now i've created a new project and i've put two different FIFO one local for the generation and one DMA for the acquisition...but the problem is that  i've tought the FPGA like a while loop in which i put 2 case structure:
1- the first with the condition Genera=TRUE in which i've put the same VI that i've used before for the generation
2- the second with the condition Acquisisci=TRUE in which i've put the same VI that i've used before for the acquisition.
In the main program after the block OPEN FPGA  i put a block of the FPGA in which i call the condition GENERA of the FPGA and at the end of the step of the VI in which i write the signal and then i generate it i put a block  of the FPGAthat call the condition Acquisisci followed by my VI for the acquisition. At the end i want to close the VI with a block of FPGA that calle the condition of the while loop that i've put into the FPGA to close all the VI.
Now in what am i making a mistake?

[Salvio]

i've tought on my problem..what i've seen yesterday was that to start the acquisition i've to stop my generation and i don't want this.

i want start generation and while the cRIO is generating i want to click on a button to start the acquisition.

So i've tought that the problem is that in my generation the VI is so structured:

1-an external case structure in which i set if i want to read or i want to write my data of the the waveform coming by the main VI

2-if i want to write i have a block of Memory Write (FPGA MODULE)

3-if i want to read (and this is the real generation of the signal on the oscilloscope) i have while loop in which i make the reading of the signal. This while loop is stopped by a control called STOP GENERATION  

So i think that this is why i can't generate and acquire simultaneously.

Now the question is: can I insert inside the while loop of generation  the VI's acquisition for being able to make them to work in contemporary or is it an error?

Tnx for replies.

[Salvio]

i've tried also this last way but it doesn't work again!
Now the question that i have is: can i put two FIFO in my project?i mean one FIFO for the acquisition and one for the generation...or must i have only one  FIFO?
plz i need help to solve this problem...

[JMota]

---

@Salvio wrote:
i've tried also this last way but it doesn't work again!
Now the question that i have is: can i put two FIFO in my project?i mean one FIFO for the acquisition and one for the generation...or must i have only one  FIFO?
plz i need help to solve this problem...

---

Yes, you can put two FIFO in your project. For FPGA-Host and Host-FPGA communication (DMA FIFO) you can have at most 3 FIFOs total. For local FPGA FIFOs, as far as I know you can have as many as you can fit in the FPGA.

Regarding how to setup your FPGA VI to do acquisition and generation, I suggest you have two independent parallel loops; one for generation and one for acquistion. That way acquisition and generation are independent of each other. Inside of each of those loops, you can enclose your logic into a case (as you were doing), so you can from the host enable/disable when that code runs.

Hope this helps. If it doesn't, please post your new project with FPGA and Host VIs. (a zip with all those files be best)

JMota
National Instruments
 

[Salvio]

The only thing that is successful to make is generation and acquisition togheter. Now as i've told before i want a button with which i can choose when i can generate or with which i can decide to stop the generation without exit from the program and that it allows to change me the generation parameters. Then i want also a button with which i can choose when i want to start the acquisition or to stop it.
Can u show me how i can do it?
Tnx to all.