i cant get to configure the ports in the sbrio to input and output

[styl@n]

i got the Sbrio few days back . i got it to be configured and i setted the ip address. I dont know how to get the port to be configured using lab view. Actually i just want one led to be lit using the SBRIO 9462. i have the fpga ,real time all modules installed. please help!!!

[Ray.R]

I'm not familiar with SBRIO 9462.  Is it an NI product?

Or is your question how to setup a TCP (network) connection?

A Google search did not find anything on the product either.  Can you provide more details?

Message Edited by Ray.R on 10-22-2009 01:05 PM

[styl@n]

Sorry Sir its sbrio 9642 !

yes its an NI product 

yeah i googled it i couldnt find much tutorials or examples for it .

i cant get the ports configured, may be i am new in fpga. 

[Spex]

Hi styl@n,

I would suggest getting started with introductory LabVIEW FPGA content like this LabVIEW FPGA Module Training and examples like these Embedded Evaluation Kit Exercises.  

As you move forward past the basics to your overall application, I would suggest the CompactRIO Developers Guide as a good start for building your architecture with I/O, communication, and control.

Currently, I don't think your question has a direct answer, because in LabVIEW FPGA, you don't configure the ports on the Single-Board RIO.  First you create a project, add your Single-Board RIO to the project, and add all the I/O nodes to the project.  Then you can create a LabVIEW FPGA VI that uses the I/O nodes in the project by dragging the I/O channels from the project to the block diagram.  You can change the channel from read to write with a right-click and select "Change to write..." in the context menu.

 

If you are not already familiar with LabVIEW, these tutorials attached to this post may help you get started with LabVIEW Real-Time and FPGA.  They are written for the sbRIO-9631 with a tutorial screw terminal daughtercard, but they may have value for you as examples.

Cheers, 

[styl@n]

I did as u said ,i made the block diagram ! created a fpga vi as u mentioned, now its always saying error code 7 and error code 1 

its saying some kind of internal software error 

[Ray.R]

From what I recall, Error 7 is related to a file that cannot be found or that the path is invalid (not found).  Unless it has a different meaning with the FPGA support.

Can you provide the details that were offered in the message for Error 1?  It would be indicative of which parameter is incorrect, as it could be a mismatch in data types. But I would have to see what the message is to determine what is the real cause.  Since your using a cRIO, it could also be a driver issue.

Are you getting Error 1 during a data read or write?  If so, then it could be related to running the configuration VI before starting the FPGA VI.  Or even the result of missing library files. 

You need to provide more details for Error 1...

[Spex]

Within Measurement and Automation Explorer, did you install software to the Single-Board RIO?  Instructions for installing software start on page 6 of this Getting Started Manual.

We will definitely need to know more about your error behavior to debug.  When are you getting the errors 1 and 7?  When you attempt to run a LabVIEW FPGA VI, the VI will go through a compile process that could take anywhere from minutes to hours, depending on the complexity of the application.  That compile converts your code into hardware configuration map called a bitfile that is deployed to the FPGA chip.  When you click the run button, you should see a dialog box that indicates it is generating intermediate files.  Those files are the VHDL code that is passed to the Xilinx compiler.  After that dialog completes, another window will open indicating the status of the Xilinx compile server.  Eventually, the dialog will complete and tell you the compile results.

Are you seeing any of the dialog boxes I mentioned above?  Are you completing the compile process and then getting the errors when you try to run the VI on the Single-Board RIO?

Do you have access to SSP/support?  Talking to an applications engineer over the phone may help clear things up.  If you have never used/purchased support, you can also get a 30-day trial.  Visit ni.com/support.

I hope this helps,

[blissful]

I get the dialog box "generating intermediate files".but then, it suddenly shows error 7 and error1. I am attaching herewith the screenshot of the error that I am getting.

The Hardware I am using a sbRIO not a cRIO.

[styl@n]

I get the dialog box "generating intermediate files".but then, it suddenly shows error 7 and error1. I am attaching herewith the screenshot of the error that I am getting.

The Hardware I am using a sbRIO not a cRIO.

[Ray.R]

According to your attached image, Error 7 is related to a file that cannot be found.

That could be caused by the following:

1.  The file does not exist or is not located in the path that was provided.  You can look in the folder where you expect the file to be and see if it exists.  If the file is created as part of your software, verify that it indeed creates it.

2.  The path is incorrect or does not exist.  A simple trick is to create an indicator (or use a probe) to look at the path in order to check that it is the expected path.  The indicator or probe would be located just before the VI that causes the error message.  Usually Open File or Write to File or similar vi's.

3. If the filename is created programmatically, check that it does create the proper name.

R