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read waveform from FPGA

We just got an NI PCIE-7851R FPGA board.  I need to do someothing very simple but haven't found yet how to do it.

 

I want to read the four A/D inputs at a selected sample frequency, and once per second from my host computer read the resulting samples as four waveforms.

 

I see how to read one sample at a timne using the example program but not multiple samples in a waveform.

 

Thanks.

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What example program are you referring to? It would be helpful to take a look at the example you're using in order to make suggestions about how to modify it.

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I don't remember seeing an example on how to do this, but what it takes is a memory buffer that the FPGA dumps samples into, and then host reads from.  This is usually a DMA FIFO, but other FPGAs have other memory, like LUTs, DRAM and a several others that can hold values temporarily.

 

https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/storing-data-on-an-fpga-target-fpga-mo...

https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/transferring-data-between-devices-or-s...

https://www.ni.com/docs/en-US/bundle/labview-fpga-module/page/how-dma-transfers-work-fpga-module.htm...

 

There is some faith involved in that the host gets these samples and you have to assume they are taken at the sample interval you expect.  But running on an FPGA it is much more dedicated than something like Windows and it will do the work the way you asked.

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Turns out there is a tutorial example that is quite close, once you learn how to use the FPGA module etc.:

http://www.ni.com/tutorial/4534/en/ 

Using DMA FIFO to Develop High-Speed Data Acquisition Applications for Reconfigurable I/O Devices

 

Thanks.

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@Hoard wrote:

Turns out there is a tutorial example that is quite close, once you learn how to use the FPGA module etc.:

http://www.ni.com/tutorial/4534/en/ 

Using DMA FIFO to Develop High-Speed Data Acquisition Applications for Reconfigurable I/O Devices


The thing I would add to that example is to use an interrupt so that the host (Windows) and tell the FPGA when it is set up and read to recieve the data.  This way you can make sure the FPGA does not put elements into the DMA before the host side has it set up and throw your measurements out of sync.


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