timed loop miss some items

[masterwho]

Hi all,

I am using cRIO 9025 AND NI 9203 to sample from seven current channels at 1000 Hz. I wrote the data with timestamp into a file. However, it seems that the sampling is not continous.

As you can see from the text file attached, the time stamps for the fisrt sample and the second sample have a difference which is 3 ms. Then this would happen every 208 samples. If you open the file with Notepad++, you would see it clearly.

And I found that if I decrease the number of channels from 7 to 1, the problem would happen every 656 samples which is very wierd.

I try my best but still can't understand why this happens. Could you please help me have a look at the VI?

Thank you very much.

[Norbert_B]

From looking into the VI, i can only guess why the "time jumps" occur so "deterministic".

But it is quite obvious to me that some things can be optimized which maybe can already remove the issue:

- Eliminate redundant code (taking timestamp).

- Remove unnecessary computations (select function, feedback for dt and false-constants).

- Stick to one datatype (change the offset and scale to double).

- Never ever compare doubles as equal/not equal!

- Split up logging from acquisition into different loops. Use RT FIFOs instead of normal queues.

I assume that the "time jumps" are generated by finished late iterations and the setting to maintain the phase and to discard missed iterations....

hope this helps,

Norbert

[masterwho]

Thank you for you help.

You are right. The "time jumps" are generated by finished late iterations and the setting to maintain the phase and to discard missed iterations. I unchecked these two options in the configuration of the timed loop and got the right sample times (i.e. 1000 samples in one second). While the period is not exact 1 ms sometimes, as you can see in the shot below. Is there some method to fix the period to be exact 1 ms?

Thank you very much!

[Norbert_B]

I assume that you still use a single loop for acquisition and logging. Split it up. Use an RT FIFO to transfer the data (aka producer/consumer framework, similar to the one used on Windows systems) to a parallel running loop which does the logging. I am quite confident that those finished late iterations are generated by the access of the flash.

hope this helps,

Norbert

EDIT: If you take a close look at the screenshots, you will find out that the timestamps <1ms are always there when the timed loop is "catching up" a finished late iteration. The easiest thing to avoid this is the info i have already written in this posting.