type-def binding lost for FPGA ref when moving to another computer

[dlanger]

I have a VI that opens an FPGA VI reference and binds the reference to type definition. The VI is working fine on one computer (Win7; LV 2010, FPGA module 10.0.0).

However, when I open the same VI on another computer (WinXP, LV 2010, FPGA module 10.0.0), the checkbox for binding the FPGA VI reference to the type definition is unchecked and, as a consequence, I get a broken wire when the reference enters a subVI that takes the FPGA VI reference type definition as an input.

See the two screen shots below. The upper image shows the situation on the first computer, where everything is fine. The second image shows the situation on the second computer. Note the unchecked checkbox on the dialog and the broken wire on the right...

Would could be the reason for that problem? How can I avoid it?

Btw: I am using the very same VI on a couple of other computers (all Windows 7), where everything is fine.

[Harlequinade]

I am working the same project... On my computer (a WinXP machine, but with LabVIEW 2010 f2) I have yet another situation: the type-def binding checkbox is unchecked, but the wire is not broken and carries a coercion dot (unlike both of your situations).

[dlanger]

Status update:

• installing the f2 patch for LV2010 did not solve the problem.
• rechecking the type-def binding checkbox on the second PC solves the broken wire problem on that very PC, but then the checkbox is unchecked and the wire is broken on the first PC! So this isn't really a solution as I need the VI be working properly on both PCs without having to have separate versions for each...

I would very grateful for any suggestions!

[Marco_Brauner]

Hi,

can you please try the steps describe in this document?

http://digital.ni.com/public.nsf/allkb/2906287B989006EA862576AB005BE08E?OpenDocument

Marco Brauner NIG

[dlanger · Accepted solution]

The problem was actually not caused by the other PC per se, but rather by the fact that on the other PC, the application was in directory with a different name. The FPGA VI reference type definition uses an absolute path, however, which gets broken when the application is in a different directory.

Might be good to store the relative path in future LV versions.

As a work-around, just use the FPGA VI reference in dynamic mode.