power up state of I/O lines with no power to PC

[ctsnc]

When the PC is not turned on and power is applied to the SSR backplane, the initial state of the output relays are not predictable. I was planning to use an interlock circuit to control 24 Volt power to the valves and relays that I do not want energizing until the PC is up, but without a predictable state on the output relays I am having trouble. I would think the outputs would either always be on or off, but this is not the case. Do you have a work around this?

[algames]

The default state for the digital lines on the 7344 after shutting down the computer and turning it back on is that they are set for inputs, hence the unpredictable state on your relays. What you can do is to configure these lines as outputs with a particular state in MAX and then save these settings as defaults to flash memory. You can the use an on board program with autorun enabled that calls the clear power up reset function on your board. An on board program with autostart will run whenever you first apply power to the board without having to wait till windows is up to run. This will set the lines into a the state you configured in MAX at the time of bootup.

[Buechsenschuetz]

We had a similar problem. In our systems some I/O lines have to be in a well-defined state even if the PC is switched off completely (our circuitry runs on its own power supply, we do not use the +5VDC output of the 7344 to supply our system). We found that pull-up resistors on the inputs of the circuitry connected to the I/O lines did not solve the problem completely, as the impedance of a non-powered TTL output is not clearly defined.

We have added a bus transceiver with output enable input between the I/O ports and our circuitry. The +5VDC output of the 7344 is connected to a reset controller the output of which is connected to the output enable pin of our bus transceiver. As long as the +5VDC output of the 7344 is below the threshold of the reset
controller, the I/O lines of the bus transceiver are in the high impedance state, and pull-up resistors on the circuitry following this bus transceivers provides clearly defined logic high levels.

[AdrianB]

I have a question regarding these posts, which I hope someone can help me with. I am using the PCI-DIO-32HS with the burst mode protocol. Group1 (ports A and B) as output, and group2 (D and C) as input, CPULL is connected to 5V (provided by the PCI card) as I want my handshaking signals to be active low. The 653x user manual states that all lines are high impendance (HiZ) on power-up. My problem is that I have found that this is not exactly true. I.e. PCLK2 is not in the HiZ state on power-up, but is outputting 5V. I need to change this because my system which connects to the PCI card, has been designed expecting that all signals should be in HiZ (basically my system is powered separately and is in a shutdown state when my PC is first turned on, therefo
re I dont want to have 5V applied to components that are not powered). I found this out in testing after the input (read) group was not working as it should.

algames said, "What you can do is to configure these lines as outputs with a particular state in MAX and then save these settings as defaults to flash memory".

Could someone please tell me how to do this (but slightly different in that I would like to make sure that PCLK2 is powered up in HiZ, or even 0V), as all I am able to do in MAX is to configure virtual channels for ports A, B, C and D.
Thanks for the help

[Buechsenschuetz]

How did you measure the voltage on the I/O lines when they are supposed to be in HiZ mode? If you do this with a DVM, you will probably get some reading different from 0V (or whatever your DVM shows when the circuit is supposed to be open), since even in HiZ mode there is a certain amount of leakage current which will be sufficient to feed the high impedance input of a DVM. (In a special application I trigger a thyristor with a TTL output and noticed false triggering when the TTL circuit was in HiZ mode - the leakage current was sufficient to trigger the thyristor gate which needs 20 uA or so to trigger.)

Also, if you connect any TTL inputs to an output which is supposed to be in the HiZ state for some time, be aware that the input m
ay float in an undefined area, since TTL inputs always have to be connected to an output with a valid (high or low) state, or to the supply rail via a pull up resistor.

To avoid the (possible) problem with leakage current in HiZ mode you can connect a resistor between the HiZ output and ground which will 'short' the leakage current. I would suggest a resistor of 4K7 or so.

To avoid any problems with non-powered circuits connected to a 5V output you can use a protection circuit consisting of a current limiting resistor in series with the input (which should not exceed 220R when using TTL or LS-TTL circuits) and a (Schottky) diode between the input (after the resistor) and the Vcc rail. A similar technique is used as protection circuit on the I/O lines of the 7344.

[AdrianB]

Hi Buechsenschuetz.
Thanks fo your reply.
To answer your question about how I measured the voltage of the lines supposed to be in HiZ. Basically each of these lines (except the PCLK2, which is the one I am concerned about) floats at a voltage in the TTL noise region, so I therefore assumed that they must be in HiZ. Furthermore, they are doing their job with no problems. However, PCLK2 is outputting 5V. I can only see 2 possible reasons for this line not behaving as specified:
1. I have inadvertently changed its power up default, by some means that I do not know. Or, if this is even possible, how to get it back.
2. The PCI card is faulty.

I think that I might have to follow your advice given in your last paragraph. The only probl
em with doing it this way, is that the included resistor will then with the parasitic capcitance filter PLCK2, which is already looking like a sinusoid at 20MHz.

[Buechsenschuetz]

Yes, of course a series resistor will act as a low-pass filter together with stray capacitance. If there are problems with the rise/fall time of fast signals I would recommend using a circuit with a Schmitt-trigger input (or at least some hysteresis) like the 74LS14 (I am not sure whether the 'LS device will work up to 20MHz) to recover the pulses.

[AdrianB]

It appears that the 5V has not had a detremental effect on the signals buffer, and that the reason that the buffer was not working was that it was not soldered properly.
Thanks for the suggestions.