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Timing in a DAQ loop with write, read, then a little processing

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(I'm using Labview 8.6, DAQmx, and a PXI-6052e. I have the Real-Time module installed if it would help to solve the problem I'm having.)

 

I am writing a control programme that needs to do a certain looping sequence, which is:

 

1. Update four digital i/o pins on the board (to set the status of a switch), then

2. Provide a pulse to another pin (to initiate the switching), then

3. Grab one sample on each of three analog inputs, then

4. Do a little processing on these three samples, and use the output to update charts.

 

Now, I know that separately my control methods for the switch and for the sampling/dsp subsections do work. However, when I try to combine them into the same loop there is a problem with timing the above sequence. Clearly I am not going about things the correct way.

 

I have attached the main VI which contains the 'main measurement loop' so that you can see how I am currently trying to do things. The loop is in the last frame of the stacked sequence (the first two are just calibration stuff - ignore them).

 

Ideally what I want is to have this loop run at 1 kHz (for example), and within each iteration have the above sequence followed [i]in that order[/i]. From monitoring the output pins and the switch output however it is clear that this is not happening.

 

Many many thanks for any advice. I know I'm doing it wrongly, but I can't work out how it is meant to be. I have tried using a timed loop but to no avail.

 

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Message 1 of 13
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Are the three analog channels just acquiring a single voltage? You could have them triggerred by one of the counters. Since they will be waiting for the trigger to occur for acquisition, your loop's timing will be limited by that step, and all other processes will occur around it.

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Also, it would be helpful if you could post your subvis. Thanks.

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Hi Jordanyorg. Thanks for replying!

 

I have attached here a ZIP with the project - including all sub VIs.

 

I think I agree that I will need to use a counter to properly synchronize everything. I'm just not sure how to yet, since I have not done this type of thing before. I will try to implement what you suggested - but in the meantime if you have any more tips they would be very welcome.

 

Thanks again.

 

Philip

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I have attached an image showing how you can configure your counter to act as a clock for your voltage collections.  The image is of the block diagram for setup_channels.vi. As you can see, I have added the counter configuration vis, and started the counter. The frequency of the counter should be set to the frequency you want to collect at. I have also added a constant to the sample clock used for the AI voltage task (/Dev1/PFI9). In order for this to work, you will need to route a wire from the counter's output on your breakout box to the PFI9 port for the same board.  Keep in mind that you will need to clear the counter task at some other point in the code. Let me know what you think.

 

Thanks,

 

jordanyorg

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Thank you very much for the advice.

 

I have been exploring something similar to your solution. It certainly can work for timing of the analogue inputs. However, I would need to be able to synchronise this with the digital outputs as well, and it is this combination that I am not sure of.

 

Most of the NI examples that do similar things (synchronised digital input and analogue output, etc) will not run on my 6052E, which is annoying!

 

What I am trying to do now is generate a repeating pattern on the Digital IO lines that takes me through all the combinations that I need at a well defined rate, and then use an edge of one of these bits to trigger the AI sampling, similar to what you suggest.

 

Do you think this can work?

 

Ideally, it would be nice to simply define some counter at 1kHz and use this to synchronously drive both the analog inputs and the digital outputs, but I don't seem to be able to do that.

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Actually it seems that with my PXI-6052E my project can't use ANY of the examples relating to Digital Output except the most basic Write Dig Chan/Port. So I can't use a clock to drive a digital output pattern on lines 0:7!

 

So how on earth can I synchronise digital output with my AI sampling?

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So, do you want the digital pulses to occur simultaneous to the acquisition? Or just before? I noticed that your digital signal is just switching from high to low for one line, every other time. Maybe you could just have another counter running at half the rate, essentially replacing that single line (or will all line be changing in the final product?).

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In the final programme I would like to have a 4-bit pattern changing to set the switch status, but for this version I really just 1 bit changing and the others held high. So just now all I really need is:

 

Counter 1 driving at 1 kHz (falling edges initiate switching).

AI sampling on rising edge of Counter 1.

Counter 2 driving at 0.5 kHz (changes on rising edge of Counter 1).

 

Such that the rising edge of Counter 1 coincides with updating the status pin and sampling, and the falling edge initiates switching while the setting pin is steady.

 

(As long as they are all synchronised this will be ok, and I can probably expand this to more counter lines in the future somehow... I hope)

 

I will try to implement this, although I am not sure how to synchronise the two counters. I'll let you know how I get on.

 

Thanks again for your help - it is extremely useful!

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Solution
Accepted by topic author PhilipOrr

I have implemented the attached file. If you could have a look at it to make sure it is not insane that would be great.

 

I am using two counters. The first is at 1 kHz and starts immediately. The 500 Hz counter is triggered to begin on the first rising edge of the 1 kHz counter.

 

Also, the AI samples are acquired on every rising edge of the 1 kHz counter.

 

In the future I should be able to expand this to have a few more counters, I suppose?

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