Hey wired,
The PCI bus contention is actually caused by the combination of the 6602 and 6132 device. More generally speaking, a combination of devices such that:
Device 1 = small FIFO
Device 2 = large FIFO
In this case, the device with a large FIFO will access the PCI bus less frequently than the device with the small FIFO. But when it does, it has alot of data to transfer. Because the device with a small FIFO needs to access the PCI bus very frequently, the device becomes starved when the large FIFO device is transferring data.
In your case, you have two large FIFO devices. Both devices will allow one to wait while the other transfers across the bus. Let me know if you have additional questions, or if you need clarification.
Rod T.
