Cosstalk simulation?

[dbur]

Anybody used MS to simulate crosstalk in PCB traces?

I have a design with 72 parallel comparator outputs that go to a CPLD.  max length is 10 inches.  Not a lot of width through the area to route.

I tried several online crosstalk simulators and got wildly varying results from -3.2 to -25 dB for the same PCB structure.  I could live with -25dB, but definetly not -3.2dB.

I'm looking at an 8 mil trace with 8 mil spacing and a ground plane at either 11.9 or 6.4 mils spacing.  Er is 4.5.  Source drive voltage is 3.3V and risetime is 20nsec.  No additional source or load terminations

(Low Z source and High Z load)

Any recommendations?

Thanks.

[Miguel_V]

Hello,

I haven't been able to find any examples or other work people have done on crosstalk. Interference dependent on component placement (as well as far and near crosstalk) isn't a feature in Multisim nor Ultiboard. Though if you have the knowhow in SPICE, you should be able to add parameters to custom amde components to create a scenario, ofcourse that would imply that you'd need to know the kind of crosstalk you're talking about as well as SPICe coding experience.

Best Regards,