Engine Simulation Custom Device Feedback

[StephenB]

Jamesy,

In NI VeriStand you are specifying what bitfile to load to what hardware in two places:

1. In hardware->chassis->fpga you are selecting an *.fpgaconfig file and specifying a device with RIO#. In this file, the XML says what bitfile to load.
2. In the engine simulation custom device you are selecting a *.lvbitx file and specifying a device with RIO#.

If #1 and #2 specify the same hardware (as in, RIO0) and they specify different bitfiles... you will get an error like you saw. You cannot load two different bitfiles to the same hardware.

As far as your labview project. However you want to manage your labview project is up to you. you could make multiple build specifications or just one and modfiy it. You can build the bitfiles to whatever directory you want. That is all up to you. Just make sure that when you're in NI VeriStand, you never try to load different bitfiles to the same hardware.

[jamesy]

got it.  I over looked that.  So I can change the folder location of both the .fpgaconfig and the bitfile but the requirement is that they reside in the same folder?   ie do I ever need to go into the .fpga config and update the location of the bit file ? it they are in the same folder I shouldn't need to, is this correct?  James

[StephenB]

All of that is up to you. Whatever you want to do with folders and files is your discretion. There is no requirements there other than the .fpgaconfig file has a tag for the location of the bitfile... just make sure the bitfile is actually in whatever location you write into the .fpgaconfig file

[jamesy]

got it thanks.  project attached:   lvprojectbackup\Testing\HIL Bench 2 setup\Labview\FPGA setup Files\HIL2_Engine_Sim002.lvproj  Files  HIL2_Engine_Sim002.vi original for one year ( but now with new libraries due to AES upgrade) HIL2_Engine_SimEA888.vi   with crank playback ( stuck at 0 )  HIL2_Engine_SimEA888_noacc .vi   tried removing you acc block with no luck VR Example : your code, modified to run on my hardware. no luck  I use an NI PXI 7854R connected to a pharlap PC ( then Ethernet to my local PC with the verisatnd GUI)

[jamesy]

note the .fpgaconfog file in the lv project is called PXI-7854R Custom Personality.fpgaconfig  this is the original legacy one.  the actual one which I modified is called : PXI-7854R Custom Personality HIL Freq.FPGACONFIG  Its never been added to the lv prohect files but I believe I don't need to.  attached.   James.

[jamesy]

Stevie ,  I can see that in the fpgaconfig the bitfile the name is specified. I do not see where its location is specified.  Did I miss something? you mentioned the bitfiles location is in here. ???   James

[StephenB]

Hey Jamesy,

Can you also add your system definition file.

Also, just at tip, you seem to have files all over the place. It would be easier if you just put all your work into a single folder. That way if you want to share a project with someone else you just share that folder instead of this crazy hierarchy you zipped up that includes files from desktop and users and program files.

[StephenB]

jamesy wrote:

Stevie ,  I can see that in the fpgaconfig the bitfile the name is specified. I do not see where its location is specified.  Did I miss something? you mentioned the bitfiles location is in here. ???   James

Jamesy,

the tag

  <Bitfile>PXI-7854R Custom Personality.lvbitx</Bitfile>

in the XML is a path. Since you just have the file name there, then it is a relative path, meaning the bitfile by this name needs to be in the same directory as the .fpgaconfig file for NI VeriStand to find it. This is detailed in the help article on FPGA XML for NI VeriStand.

[jamesy]

perfect, I just saw this help info written the xml.

[jamesy]

So I'm still trying to load my original file.  I was extremely careful and followed your guidelines for .fpgaconfig and bit file naming.  When I deploy I get the following error attached. it mentions a timing source being missing. I'm not sure what its talking about.