08-05-2018 10:44 PM
I haven't personally tested this custom device in 2017 or with a bitfile that is compiled in a different version of LabVIEW than the custom device. However, I suspect, if there is a problem with communication to the FPGA, it is due to the RIO Advanced Session Resources VIs in the custom device not properly linking to the new bitfile. If you or the customer can you may want to check on those. I'm not at my desk right now so I can't test this immediately, but you can check these VIs by looking in the initialization case of the custom device RT Driver VI.
08-05-2018 11:14 PM
@Miles
Thanks for the rapid answer. Does it mean that we need to open source code on the host PC to run RT Driver VI? It is not easy to simply understand because the custom device doesn't require any library like RIO Adv.Session or something.
For your information, it successfully reads data from bitfile when it calls bitfile on System Explorer, but the I/O couldn't be changed through workspace.
Best,
Chung, Jaehyung
NIK AES
10-01-2018 04:59 PM
Is there a 2018-compatible version anywhere? I'm on a newly-upgraded system running LV & VS 2018 and I can successfully build the Custom Device from the source on GitHub. I don't know the exact cause of the error as I can't find a 2018-compatible version of the FPGA Advanced Session Resources installer. I've tried installing the 2017 version (not expecting it to work) and it just refuses to install anything.
I don't need to change anything with the Custom Device itself, I'm just trying to find out why the build is failing. I have everything except the Advanced Session Resources components installed, but no luck building in LV2018.
10-01-2018 05:27 PM
Hi ElectricWraith, unfortunately as you noted we don't have an installer up yet up for the LabVIEW 2018 FPGA Advanced Session resources. I'll send you a PM with some instructions.
Best,
Andy
10-02-2018 08:38 AM
Andy,
You sir, are a gentleman and a scholar! Thanks!
11-19-2018 08:01 AM
11-19-2018 08:55 AM
PiDi,
Yes, it will work just fine. I'm not sure off the top of my head if the FPGA target is required to use the EST I/O, I always have a target configured because of the way I use my systems. But, rest assured that both can coexist on the target with no issues.
11-19-2018 03:22 PM
11-21-2018 03:19 AM
I can confirm It can be used without an FPGA target, I'm doing just that.
12-19-2018 08:30 AM
Hi everybody!
I'm trying to use the Engine SImulation Toolkit with an ethercat module (the NI 9144). I want to use the FPGA of the 9144 as the target. The problem is that I cannot see it in MAX, so I cannot know its RIO Resource Name to insert in the "Device address" field of the Engine Simulation Toolkit. Anyone knows how to get this RIO Resource Name in other ways? Or if there is another way to select the target?
Thank you very much!