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Engine Simulation Toolkit Feedback

I haven't personally tested this custom device in 2017 or with a bitfile that is compiled in a different version of LabVIEW than the custom device. However, I suspect, if there is a problem with communication to the FPGA, it is due to the RIO Advanced Session Resources VIs in the custom device not properly linking to the new bitfile. If you or the customer can you may want to check on those. I'm not at my desk right now so I can't test this immediately, but you can check these VIs by looking in the initialization case of the custom device RT Driver VI.  

Miles G.
National Instruments
Staff Applications Engineering Specialist
Message 181 of 200
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@Miles

 

Thanks for the rapid answer. Does it mean that we need to open source code on the host PC to run RT Driver VI? It is not easy to simply understand because the custom device doesn't require any library like RIO Adv.Session or something. 

For your information, it successfully reads data from bitfile when it calls bitfile on System Explorer, but the I/O couldn't be changed through workspace.

 

Best,

Chung, Jaehyung

NIK AES

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Message 182 of 200
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Is there a 2018-compatible version anywhere? I'm on a newly-upgraded system running LV & VS 2018 and I can successfully build the Custom Device from the source on GitHub. I don't know the exact cause of the error as I can't find a 2018-compatible version of the FPGA Advanced Session Resources installer. I've tried installing the 2017 version (not expecting it to work) and it just refuses to install anything.

I don't need to change anything with the Custom Device itself, I'm just trying to find out why the build is failing. I have everything except the Advanced Session Resources components installed, but no luck building in LV2018.

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Message 183 of 200
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Hi ElectricWraith, unfortunately as you noted we don't have an installer up yet up for the LabVIEW 2018 FPGA Advanced Session resources. I'll send you a PM with some instructions.

 

Best,

 

Andy

Message 184 of 200
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Andy,

You sir, are a gentleman and a scholar! Thanks!

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Message 185 of 200
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Can the Engine Simulation Toolkit be used together with FPGA personality on the same FPGA target? I mean this (of course I assume both FPGA and APU will use the same bitfile):

fpga.png

 

 

 

 

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Message 186 of 200
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PiDi,

Yes, it will work just fine. I'm not sure off the top of my head if the FPGA target is required to use the EST I/O, I always have a target configured because of the way I use my systems. But, rest assured that both can coexist on the target with no issues.

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Message 187 of 200
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Thanks for confirmig it 🙂 I took a closer look at the custom device in the meantime and it seems that it should work both with and without the FPGA target configured.

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Message 188 of 200
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I can confirm It can be used without an FPGA target, I'm doing just that.

 

Capture.PNG

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Message 189 of 200
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Hi everybody!

I'm trying to use the Engine SImulation Toolkit with an ethercat module (the NI 9144). I want to use the FPGA of the 9144 as the target. The problem is that I cannot see it in MAX, so I cannot know its RIO Resource Name to insert in the "Device address" field of the Engine Simulation Toolkit. Anyone knows how to get this RIO Resource Name in other ways? Or if there is another way to select the target?

Thank you very much!

screenshot.png

 

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Message 190 of 200
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