08-14-2013 02:08 PM
4.0 is posted that fixes one bug with local chassis and adds a lot more module support, including data rate
08-14-2013 02:08 PM
note the upgrade notes, you must mutate.
08-16-2013 01:01 PM
Hi,
I just upgraded my Scan-engine CD to version 4.0. I created a new NIVS project, I can successfully detect my cRIO modules located in a remote NI-9144 connected to a cRIO-9082 running NIVS-2012 SP1.
When deploying the project, I get a 1003 error. When opening Web console while deploying, I get some errors (Cf capture below) before 1003 error is displayed.
Regards
Vincent
I
08-16-2013 01:13 PM
I just rebooted my cRIO and I can deploy my NIVSSDF file.
Regards
Vincent
08-16-2013 01:30 PM
Yikes. Scared me!
08-21-2013 09:56 AM
I built a system for a customer that includes Veristand running on a PXI controller and an etherCAT network (serial topology) that includes (5) 9144 Chassis'. The last chassis uses custom FPGA and the rest are using the scan engine. I have installed:
The application works great, including the FPGA! However there is an issue that surfaces that is difficult to both solve and determine the cause. It may fail to deploy with the cause of the last chassis not communicating (custom FPGA). I believe this happens when the power has been removed for some of the chassis but not all. Maybe the chassis that was powered off is still in a mode other than configuration (scan engine). I have had this happen three times only and each time I got it to work with different approaches. I have a short memory so forgive me if I do not have the exact details.
Any information is greatly appreciated.
Thanks,
Chris
PS. Love the custom device. Great work.
08-21-2013 10:13 AM
Hi Chris,
Usually power-cycling the system should be enough to get the EtherCAT slaves into the correct state. You can access the utility in LabVIEW by right-clicking the 9144 in the project and selecting "Online Device State...". In order to do this, you will need to be connected to the target (which is why it's showing up as greyed-out in my screenshot below).
09-23-2013 10:21 AM
Hi,
I want to report a problem with Shared variable names. Once there is underscore character in the shared variable name hosted on FPGA in some cases you will get the following error:
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
The VeriStand Gateway encountered an error while deploying the System Definition file.
Details:
Error -2147138277 occurred at Project Window.lvlib:Project Window.vi >> Project Window.lvlib:Command Loop.vi >> NI_VS Workspace ExecutionAPI.lvlib:NI VeriStand - Connect to System.vi
Possible reason(s):
A mismatch was found between user-defined variables deployed and running on the slave device's FPGA. Updating and redeploying the project, or re-downloading the FPGA VI, may fix this problem.
=========================
A mismatch was found between user-defined variables deployed and running on the slave device's FPGA. Updating and redeploying the project, or re-downloading the FPGA VI, may fix this problem.
=========================
NI VeriStand: NI VeriStand Engine.lvlib:VeriStand Engine Wrapper (RT).vi >> NI VeriStand Engine.lvlib:VeriStand Engine.vi >> NI VeriStand Engine.lvlib:VeriStand Engine State Machine.vi >> NI VeriStand Engine.lvlib:Initialize Inline Custom Devices.vi >> Custom Devices Storage.lvlib:Initialize Device (HW Interface).vi
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
• Unloading System Definition file...
• Connection with target Controller has been lost.
Work around is to not use special characters and underscore in variable name.
Ondřej
09-23-2013 10:44 AM
Hi Ondřej,
Thanks for the report. This is strange since all we do is compare the names in the sysdef to what the variable API name property returns.
I wonder if that property returns some escaped name or something like that.
Can you use the attached VI to browse to one of your IO variables and then run it to ge tthe name property? Thank you
09-23-2013 11:32 AM
Hi,
I already wrote to Devin_K in PM I can provide him (or to anybody who is involved in EtherCAT Custom Device development) source code and bifiles to be able to reproduce and work on this issue. It took me almost two weeks to find out the reason behind this issue and to be honest I am not willing to continue in this (mainly because of the time reasons). So if you want it, feel free to send me PM with your mail contact and I will give you the code.
Thank you,
Ondřej Kuba
NIEE AE