03-03-2009 11:02 AM
Solved! Go to Solution.
03-04-2009 11:34 AM
Every control or indicator you create in your LV FPGA code allocates space on the Xilinx FPGA. As with all FPGA coding, there is no way to tell a 'hard limit' on space. As you add more controls and indicators, your compile will take longer and do different things to optimize where everything is stored on your FPGA. You can look at the compile report to see how much space you have left.
As far as the speed specification between the card and your host computer, that is going to just be the PCI specification speed of 133.3 MB/s - overhead.