I am using PXIe-1073 Chassis and NI 7961R FPGA module with NI 6583 adapter IO module
I wanted to implement simple SPI communication using the IO pins in the 6583 adapter module. target vi should be fixed implementing the spi protocol the host sending the values to be sent in SPI communication.
So considering Basic channel in NI6583
DIO 0 - Master cs
DIO1 - Master SCK
DIO2 - Master dout
and
DIO 3 - slave cs
DIO 4 - Slave sck
DIO 5 - slave out
wanted to know how it can be implemented with some examples or concepts. please help me regarding this
