Best way to transfer data from FPGA to RT target to host PC?

[Dr_Laine]

I am using a PXI7831R with PXI8176 controller Ethernet to PC. I am using the Command-Based Architecture method to transfer data between RT and PC (http://zone.ni.com/devzone/conceptd.nsf/webmain/CD63FD0F746B17A686256F090065F572).

Now I want to collect data using the AI of FPGA card as follows:

1) Poll AI at 100 kHz on FPGA
2) When AI crosses threshold, collect 10000 points at 100 kHz
3) Perform acausal lowpass filtering (on FPGA or RT controller I'm not sure)
4) Transfer (raw or filtered) data to RT vi (time-critical vi)
5) Perform some analysis (peak value, freq analysis, etc.)
6) Resample set to 500 points and transfer to host PC for user display

I have written the FPGA vi to poll and begin data collection, but I am not sure how to store or transfer the data.

My question is how to transfer the 10000 points from FPGA to the RT Target?
I think data transfer is usually by indicators of the FPGA vi, but if I use an array indicator of size 10000 (or even 1000), the vi compilation will never complete.
If I use FPGA FIFO, can the time-critical vi running on the RT Target read it directly?


Thank you.

[preston_johnson]

For transferring to RT, you might consider upgrading to LabVIEW 8.0.  IN LabVIEW 8.0 FPGA and 8.0 RT there is a nice DMA function that transfers blocks of data from the FPGA FIFO to RT, without having a front panel control.  It works well. 

Alternatively, in LabVIEW 7.x, there is an example for the 9215 for transfering data via the front panel and polling.  The example can be extended to use a FIFO, so that the DAQ part of the FPGA can be guaranteed to get the data without loss, then the RT can pull the data in polled or interrupt mode form the FIFO by reading one scan at a time (your front panel array has one element for each channel) until it gets the entire data set. 

Regards