Hello ArifH,
There are two issues with your VI:
1. Your Time VIs are set to use milliseconds as opposed to microseconds.
2. The "triangles" you are seeing is due to the default interpolation mode of the waveform chart. If you right click the plot legend (the small image on the top-right corner of your chart) and choose one that's more appropriate for a digital waveform.
There is also a timing consideration which is that when you run the FPGA VI in simulation, the timing is not accurate. The loop will actually run as fast as possible with no timing. Your waveform, however, should still look approximately correct, but the actual up and down time will not always be exact. There are a couple of ways to address this. One way is to make your counter a sub VI and stick into a while loop or timed loop in a desktop VI that serves as a "testbench" where you control the timing. You can then capture the output of the subVI and check it against your expected results to see if it matches.
As for examples, it appears to me that you want to generate a pulse train at a particular frequency with a 50% duty cycle (i.e. rise time and low time are equal). Check out this page that has a PWM output VI: http://zone.ni.com/devzone/cda/tut/p/id/5963
Since you will have a constant duty cycle, you can remove some of the unnecessary code.
Gerardo
