11-02-2015 02:09 PM
I would love a testbench for this top level verilog code. I don't see one in the repository.
The Verilog source code for the FPGA on the B200mini is located in:
https://github.com/EttusResearch/fpga/tree/UHD-3.9.1/usrp3/top/b205
Any help is appreciated,
Michael
11-03-2015 05:21 PM
11-06-2015 06:38 AM
No I have not. I guess I will try now