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FPGA Analog Output - 5V Square Wave

Hello,

 

I am trying to output a 5V square wave using the Analog Output channels to drive a TB6600 stepper motor driver pulse signal. I've checked with an oscilloscope, but this is not outputting a square wave at all. Could you help me figure out what's wrong?

I am using an NI sbRIO 9628 FPGA board. 

dhanes_0-1784651050517.png

 

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Does the NI sbRIO 9628 FPGA board have a DIO port?  You describe wanting to output either +5V or 0V, which can be realized by driving a DIO port with a Boolean T (+5V) or F (0V).  You can realize this with an FPGA by "obvious code", having a Boolean  (on a Shift Register) that in one frame, is wired to the DIO with a Timed Wait (for the time you want the voltage on or off), inverting the Boolean signal before sending it to an (almost) identical frame with either the same or different Timed Wait, and again inverting it before exiting.  There are several ways you can turn this "Pulse Generator" on and off with a "Run Pulser" Boolean (for example, run or don't run the two-state Pulse Generator).

 

If the hardware has a function that does exactly what you want (i.e. generate 0 or +5 V), you don't need to do extra work to simulate this output.

 

Bob Schor

 

Bob Schor

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Hi dhanes,

 


@dhanes wrote:

I am trying to output a 5V square wave using the Analog Output channels to drive a TB6600 stepper motor driver pulse signal. 

 

I am using an NI sbRIO 9628 FPGA board. 


The sbRIO offers several DIO pins, which are described as "5V tolerant": you would need an additional amplifier to convert the 3.3V high level to your needed 5V level.

DIO signals typically are easier to handle in code - and many motor drivers also can handle 3.3V digital signals ("LVTTL")…

 


@dhanes wrote:

I've checked with an oscilloscope, but this is not outputting a square wave at all.


The AO of the sbRIO9628 supports a ±10V range: what does your scope show "at all"?

  • Why don't you start with a much more simple VI where you can adjust the AO output using a control?
  • Did you notice the coercion dot at the IONode? Do you know what it means and how it can influence the AO output?
  • Which kind of datatype does the IONode expect? (Some FPGA IONodes might need "raw" DAC values, some might expect a FXP of a certain datatype & range, but using an integer value like you do might produce simply wrong values…)

 

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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