Store and Edit a variable on a cRIO 9075 NVM

[Tom_@_RTC]

Hello,

I am currently developing a FPGA program to run on a Compact RIO 9075 with Labview 2012 plus the Realtime and FPGA bolt ons that were released with that version.

It is a simple program that reads in a high frequency digital transducer and outputs the displacement as an analogue output (+-10v).

As part of the program I have a Datum feature that allows the user to set any given position as the 0 point. The issue I face is that if the cRIO is turned off it will forget what the datum offset is so when it is turned back on it requires the user to re-datum the system.

Is it possible to store the offset value within the NVM (Non-Vilotile Memory) on the FPGA?

If so is it also editable so the user can change the 0 point on the transducer while it is running.

Cheers

Tom @ RTC Electronics Ltd

[Wilson54910]

Hi Tom, 

Have you thought of sending the Value to the RT and then saveing the value into a text file and read that back at the start of the program? 

[Tom_@_RTC]

Nathan,

Our intent is to create the FPGA program load onto the cRIO flash and then run it as a stand alone platform without a GUI to control it. Therefore we cannot rely on setting values or getting values from the GUI. 

The set datum is a digital input that I detect a False to True edge that then automatically sets the current position as the 0 point. 

I almost need an internal storage that I can write a file to containing that number which as part of the FPGA startup it reads in.

I have tried using the FPGA memory blocks, however all of these are cleared on power down. There does not seem to be any other form of memory blocks available to store such data.

Cheers

Tom @ RTC

[dkfire]

Just to make a few things clear.

An FPGA don't have NVM, it is not like a CPU. It is hardware, that is composed of logical gates.

A cRIO does not have any GUI, but is has a CPU and a RTOS. This RTOS has a file system, where you can make us of it to store files.

If you what the cRIO to save some values between power reset, you need to program is to store files with the data on its internal disk.

When the cRIO is turned on, before is startes the FPGA, you can have it read files from the internal disk. And the supply the FPGA with the valules before making it run.

[MikeeB]

Hi

You could use the 9802 module as this allows storage directly from the FPGA

https://www.ni.com/en-us/support/model.ni-9802.html

Then you can read and write directly from the FPGA with no RT involvement.

Mike

[Tom_@_RTC]

The problem I have is the FPGA will have the Bitfile stored to its flash and then automatically ran on powerup / reset. Therefore labVIEW / RTOS is not being ran to pull data backwards and forward from the cRIO.

I could possibly deligate one of the existing computer systems I have for running the VI that goes with the FPGA program but I would need it to access the file and send the contents to the FPGA, which I cannot find blocks within the VI Functions in FPGA mode that allow me to do that. All I have are;

structures

arrays

clusters

numeric

boolean

comparison

timing

fpga i/o

data storage

sychronisation

FPGA Math

IP Integration

Xilinx library blocks

I do not have the normal LabVIEW libraries like when you develop a standard project.

Having the VI running is not an ideal solution, is there no way to access any of the flash memory where the FPGA program is stored to store a variable??

Cheers

Tom @ RTC

[dkfire · Accepted solution]

Just have a vi run on the RIO ( NOT the FPGA )

You know that the RIO is the RTOS ?

If you place a vi under the RIO, but not under the FPGA, you should be able to create and save files.

Have you seen this: NI LabVIEW for CompactRIO Developer's Guide

Or maybe this: Getting Started with CompactRIO - Logging Data to Disk

 And just searched your RIO: The cRIO-9075 features 128 MB of DRAM for embedded operation and 256 MB of nonvolatile memory for data logging

This is not the FPGA, it is the RIO itself.

[dkfire]

And just to help more, I did a quick new project with your cRIO-9075:

The Untitled 1.vi is under the RIO, placed in the flash, and can control the FPGA and create files etc.

The Untitled 2.vi is under the FPGA, and is running in the FPGA.

You can have the Untitled 2.vi in the FPGA run only when the Untitled 1.vi is telling it to do it.

Any program in the FPGA don't have to run at startup.

Non of the vi's require a PC to run.

[Tom_@_RTC]

I have got all that working now.

Thanks very much for your help 🙂