how generate 3 ph square pulses, and use them to trigger two analog inputs?,

[behappy]

Task:

1)      Generate continuously 1 Hz 45 ms pulses on three output lines shifted 120 degree.                                                  

Other wards, three phases (three outputs) 120 degree apart, but instead of sine wave should be a 5 Volt pulse 45 ms long with one second repetition. I need these pulses to drive external circuitry. The 1 Hz tolerance is loose, but 45 ms must be within 100 us.

2)      Measure (trigger) two independent DC voltages 45 ms and 50 ms after each rising (leading) edge of each pulse. The 45 and 50 ms must be within 100 us.

Other wards, each measurement begins 45 ms for the DC source #1 and 50 ms for the DC source #2 after initiation (rising leading edge) of every pulse of total six measurements per 1 second (per 1 Hz cycle).

3)      One analog output must provide continuously (be reserved for) negative  DC voltage to be used as a supply source for external circuitry.

I get to the point when I can generate continuously 45 ms 1 Hz pulses using CO (0) and trigger AI(0) on falling edge. AI(0) is hard wired to AI(0) trigger.

How to do another AI(1) and remaining two lines (two phases) and link them to AI(0) and  AI(1)?

Equipment: LabView 8.6.2, PCI-6221 (37 pins)

[John_P1 · Accepted solution]

Hi behappy,

Thanks for posting and welcome to the NI forums! I think we can get close to what you need with the 37-pin variety of the 6221:

1) Our M Series devices only have 2 counters, so you can't generate all 3 pulses from these alone. One solution would be to use correlated Digital outputs.

Unfortunately, the 37-pin 6221 only has two correlated digital I/O lines, so you would have to use an odd mix of counters and Digital I/O to implement the three pulses. It would still be doable--for example you could use one counter for a timebase for the Digital I/O lines, and the other counter to output the third pulse. You would have to synchronize the start of the two counters to ensure the appropriate phase of your signals.

2) There are essentially two parts to this question, so I'll try to divide it up:

i) Combine the three pulses together to generate a single signal to sample off of. I believe this would be doable on another M series with a higher number of correlated Digital I/O lines using change detection (see M Series User Manual). However, at this point we are simply out of correlated digital lines to use, and I don't think it is possible on the 37-pin 6221.

If you must use the 37-pin 6221, what you will likely need to do is provide your own external circuitry to OR the three pulses together.

ii) Get the 5 ms delay to sample your second channel. Since you already found out that you may sample from the falling edge of the digital signal to get the 45 ms delay, you would just need to add another 5 ms delay before you sample your second AI. You should be able to do this by setting the Convert Clock Rate in DAQmx (5 ms would correspond to 200 Hz). The Convert Clock is what is actually sampling the data (keep in mind the M Series boards are Multiplexed).

To do this, simply use the DAQmx Timing Property Node, then select: More >> AI Convert >> Rate.

3) This one's easy--we haven't used any AO channels yet.

So, the 37-pin 6221 is a bit less than ideal since you don't have enough correlated digital I/O lines to do the pulse generation or change detection--but it should still get the job done if you can combine the three pulses yourself externally and don't mind using the extra counter to generate the third pulse.

I hope this helps, if you need any help finding relevant examples please don't hesitate to post back. Thanks!

-John

Message Edited by John P on 07-02-2009 08:37 PM

[behappy]

Hi John,

I am glad you responded with a great advice.

I am going with an external three inputs OR-Gate to trigger two analog inputs to get exact 45 and 50 ms delay measurements.

Since your response,  I add second counter (Co1 Pulse Time) and trigger it by the first counter Co0 (Pulse Freq.) running continuously 1 Hz 45 ms, it works !

Second counter is triggered by the output of the first one (rising edge).

Second Counter is set up with:

Initial delay = 333 ms

Idle state= low

High Time  = 45 ms

Low time = 50 ms

What I need now is a digital out to generate third pulse 333 ms after the second one or 666 ms after the first one.

The 45 ms pulses shall be within 100 us, and I hope they are. The 1 Hz and 333 ms intervals can be within +/-10 % (very loose tolerance).

Few experiments with a digital output triggered by the first or second 45 ms pulse to get delayed third pulse did not materialize yet.

Right now I am working on two analog inputs, we see what happened.

John, any suggestions or direction to a sample circuitry?

Tks, behappy

[John_P1]

Hi behappy,

The third pulse is where the task gets a little tricky, since as you have noticed you are now out of counters on the 6221.  However, the 37-pin 6221 is capable of HW-timed digital I/O on two lines, provided you have a sample clock source.  What I was suggesting in my previous email was to use a counter to generate this sample clock, then use the digital I/O lines to output the 2nd and 3rd pulse.  The first pulse would come from the other counter.

You can check out the Correlated Dig Write With Counter.vi shipping example to help get started.  You would write an array of digital data to the DAQmx write buffer that would correspond to the desired pulses.  For example, if your sample rate was 1 kHz, your array would be:

333 samples of 0, 45 samples of 1, 622 samples of 0

666 samples of 0, 45 samples of 1, 289 samples of 0

This would give you the 45 ms pulses at 333 ms delay and 666 ms delay from the start of the digital task (trigger the counter that is generating the sample clock off of your other counter).  The entire signal would repeat every 1 Hz.  The code would follow this structure:

Configure Tasks (specifically, configure Counter 1 to trigger off of Counter 0) >> Start Digital Task >> Start Counter 1 (to be used as sample clock for Digital Tasks) >> Start Counter 0.

If set up this way, everything would start at the same time as Counter 0 which is generating the first pulse.  There isn't going to be an example out there to do exactly what you need, but I think if you look into the shipping example to see how to do Correlated Digital Output this should make more sense.  Let us know how everything goes!

-John

[behappy]

Hi John,

Finally I programmed Ai0:1 with the Convert Clock.  To verify functionality I made following settings:

Sample Clk. Rate = 0.2

AIConv. Rate = 0.5

1 sample per Chan.

The DAQmax Read  is set to:  1D DBL NChan 1Samp

These settings give 1 second delay (approximately).

The Value Indicators on the computer screen and on the graph upgrading readings for both channels at the same time, i.e., 1 second after triggered from outside source (Co0). If the measurements are taken 1 second apart why they are showing up on the computer screen at the same time? Are measurements really 1 second apart?

The whole idea works only for Sample Clk Rate equal or less than AI Conv. Rate, which, I guess, is OK for my application until A to D converter reads voltages (converts) on a raising edge.  

I did not have a change (yet) to work on the third pulse line. My backup is to use external shift register 74164 with gates to get these three pulse lines triggered by one Co running 45 ms at 1 Hz.

I understand that this board (6221) has some limitation but we purchased LabView and the PCI DAQ few weeks ago not having any experience at all.

I can consider buying the second board with RTSI cable if that helps.

John, what is your opinion.

Tks, behappy

[John_P1]

Hi behappy,

What I had in mind was to use the combined pulse signal (from your external OR Gate) as AI Sample Clock.  You can set the AI Sample Clock Source to be one of the PFI Lines, and connect the combined pulse to this line.  You would configure the sample clock to sample on the falling edge of the pulse (45 ms after the rising edge).

The Convert Clock Rate should be 200 Hz (5 ms period).  This would give you the second sample at 50 ms (45 + 5) after the rising edge of your pulse.  Page 72 of the M Series User Manual has a good diagram of the relationship between convert clock and sample clock--you may want to look through the manual for good information about how the board functions.

A common concern when using an external sample clock in situations like this is its relative phase to the convert clock.  I believe you should be OK in this case since the pulses being generated are synchronized to the same master timebase as the convert clock; however, there may be an issue with the delay from routing the pulses from the board, through external circuitry, and back.  If you have problems, there should be ways around this by delaying the convert clock signal as necessary.

It sounds like everything you need to do can be accomplished on the single board (using an external OR Gate).  You don't absolutely need the shift register (74164), but you could use it to delay the pulse from one of your counters to give you three pulses offset by a desired amount.  You could use the other counter as the clock for the shift register.

We are getting into pretty advanced DAQ topics, especially if this is the first time you have ever used LabVIEW and our DAQ hardware.  If it's possible, I'd like to take a look at your code to see how everything is coming along.  You can attach it to your post.  

Regards,

John 

[behappy]

Hi John,

I got Ai0:1 working and triggered from the Co0.

Just to verify functionality, settings are different (later on they be changed), slower pulses to easy observe them (no scope) only analog volt meter and LED on my desk.

My only question is: both readings Ai0 and Ai1 are updated on the computer monitor 2 second after trigger pulse. This raises a question if they are really taken at the trigger (0 second, Ai0) and 2 seconds later (Ai1). This suggests that readings are store first in the buffer and after task is finished passed thru to the software.

Tks for pointing out the timing issues, that was good reading (“M Series User Manual”).

As of today I got:

1)      Two Ai with Convert adjustment (delay)

2)      Two Co, first generating “Pulse Freq.”  and starts by the software and the second  “Pulse Time” with time delay, high time, and idle state triggered by the first Co0.

3)      Hardware: OR gates

Now I am working on the third pulse line. Due to time limitations, the 74174 may be a solution. With 4 flip-flops and an inverter should not be that difficult (three lines shifted 120 degree) clocked by the one Co.

I would like to open an “Active Support Request Number”.

Tks, behappy

[John_P1]

Hi behappy,

There are buffers that could account for a delay between when the data is actually sampled and when it shows up on your monitor.  The data is only updated in LabVIEW every time you call DAQmx Read.  As far as verifying that the hardware is correctly configured, I would have to look at your code to be sure.

If you would like to open a Service Request number, you can use the following link to contact us by phone or email: ni.com/ask.  Be sure to reference this forum post in your email or phone call so the engineer knows to come find me if they have any questions.

It does sound like the shift register would be a good way to go--if you feel confident that you can implement the delay there then this might be easier.  I just wanted to point out that the same behavior is possible on the 6221without any additional hardware using Correlated Digital I/O.  It sounds like the application is coming along nicely, please don't hesitate to ask if anything comes up.

-John

[behappy]

Hi John,

I wrote a code for the Digital Output to generate a pulse shifted in time compare to Sampling Clock.

 

Test code structure looks like this:

1)      The Co1 generates 20 pulses (just for now) and is triggered by an external 5 V.

2)      The Digital Port0/line0 is clocked off of Co1 with a pattern (0s) and (1s) generator. This generator is connected to “Data” port “DAQma Write”. The “DAQmx Write is set for Digital 1D U8 1Chan NSamp.

This circuit works well. I am not sure if execution sequence is right, but it seems to be OK with 1 Hz slow pulsing.

 

To that circuit I added an additional Digital Line Port0/line1, an exact copy of the previous one. Both Digital Lines use as a sampling clock the same Co1 output terminal. Also, the Daqmx’s  Timing Sample Mode Terminals are connected together.

So, they are three sub circuits: Co1, Digital Port0/line0 and Digital Port0/line1. Data flow is set by the “Flat Sequence Structure” and goes from left to right as follow: line1,lineo,Co1.

This setup does not work. At the start, an error message pops up and says: Error-50103 occurred at DAQmx Writ (Digital 1D U8 1Chan NSamp).vi2.

Changing Port0/Line1 to Port1/Line0 does not help.

Any suggestions?

The analog line with two counters are also finalized.

I can forward a file to any email address?

Tks

[John_P1]

Hi behappy,

The error you are receiving is a "resource reserved error".  It sounds like the problem is that you are using two different tasks for Digital Output--these should be combined into the same task (note the hardware-timed digital outputs must use the same sample clock).

I hope this helps--you can contact NI at the following link: ni.com/ask.  I'll keep an eye out for your email tomorrow.

-John